4KNeural recordingXie–Luan labs · Team design review
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System overview

4K neural recording

Overview V25A · Custom FPGA approach

System architecture
Loading compact assembly…
ISOMETRIC
Drag to rotate · Scroll to zoom · Select a board
Earlier assembly concept · preserved geometryHistorical XEM8310 shapes · open subsystem tabs for current boards

Architecture & current work

From the headboard to the host.

Selected hardware path

Under development · switch approaches above.
A Custom FPGA approach

ASIC stack → LDO V13 + FPGA V54 → cabled XEM8305 host → PC

Assembly study · interposer V12 placement snapshot. Saved subsystem checkpoints remain below. B Parallel alternative · direct-LDO carrier

ASIC boards → existing LDO board → Carrier V1 → XEM8305 → PC

26 October update · 80/80 component bodies verified in native 3D; zero native DRC, opens and parity findings.
Design review · source notes

System overview

Model provenance and presentation scope

Approach B now shows the 26 October Carrier V1 from-scratch revision. All 80 native component-body model assignments resolve and were visually checked. The public rotatable assembly adds XEM8305 and original LDO geometry using freshly checked connector datums and nominal mating gaps. Public body geometry is independently authored; supplier model files remain local. Native CAD checks are scoped to the saved project rules. Verification summary · Model scope and open qualification. The earlier V42 overview is preserved.

Approach A’s Overview shows the V23 assembly study: same-facing ASIC board concepts, flat LDO V13, FPGA V54 and the separate BRK8305 / interposer V12 placement snapshot / XEM8305 host. One timeline seats each assembly; sheep context is optional. Public connector previews are project-authored nominal geometry with supplier references, while exact supplier CAD remains local. ASIC pass-through redesign, populated fit and hardware operation remain unqualified. See V23 model coverage, source revisions and omissions.

The native subsystem sections retain their saved FPGA V41, LDO V5/combined V7 and host V4 checkpoints. Their preserved model sources and transforms remain available. The V5 overview preserves the earlier assembly and September adapter study.

The original 650-triangle STL remains preserved byte for byte in the repository and earlier overviews.

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Latest project updates

Updates

Whole assembly · XEM8305 + Carrier V1 + LDO

The overview now includes XEM8305 and the original LDO around the current Carrier V1. Use Seated, Illustration spacing, visibility and board focus to inspect their nominal alignment. Carrier model coverage remains 80/80; its native layout, circuit and public KiCad review package are retained.

Open the updated alternative →Open whole assembly →Verification scope →

Interactive assembly study · V23

Use one progress control to assemble the ASIC/LDO/FPGA stack, seat interposer V12 onto BRK8305, then seat XEM8305. Inspect boards or components while scrubbing; sheep context is optional and off by default. BRK surface rendering is corrected. The public viewer uses nominal connector previews; the matching ASIC redesign and populated fit remain open. Saved board sections and the direct-LDO carrier V42 are preserved.

Open the assembly overview →Open full-size viewer →Model coverage and sources →

Carrier V42 · visible rail indicators

D601 is now on the underside so all three rail-presence LEDs can be viewed together while the boards are stacked. Its indicator branch is the only routing change; unrelated routing is preserved from V41. The assembly view, native layout, schematic and downloads now use V42. Drag Illustration spacing to separate the boards visually. The saved JLC quote remains V41; sourcing and factory review are still open.

Inspect preserved carrier V42 →Review package and status →

Full board detail · interposer inspection

The host stack now uses full geometry. Select Interposer only to reveal all 52 components, native pads, silkscreen and soldermask, then use Top, Bottom or 3D to inspect it.

Inspect the current boards →

Separate assemblies · micro-HDMI cable

The compact FPGA/LDO electronics sit apart from the BRK8305 / interposer / XEM8305 host stack and connect by a visible micro-HDMI cable. Current part descriptions use board revisions without assigning individual people.

Open the cabled 3D overview →

Current boards together in 3D

Rotate the four ASIC reference boards, FPGA V41 + LDO V5, and current BRK8305 / interposer V4 / XEM8305 stack together. Switch to the combined V7 power option or focus a board group.

Open the current 3D overview →

Two parallel approaches

Choose A or B using the approach switch. Only the selected hardware path, board sections and overview assembly are shown. Previous/Next and keyboard navigation stay within that approach.

Open the selected overview →

Current board previews and files

FPGA V41, separate LDO V5, combined FPGA / shared LDO V7 and direct-LDO carrier V17. Native views, schematics and complete KiCad projects are available in their sections.

FPGA V41LDO V5 / V7Carrier V17 · historical
14 October review presentation ↗Project library ↗