1. Negotiate power
The controller boots before the FPGA. It checks the source, requests power and enables the protected main supply.
Same 100T. New USB-C link.
In development · not for manufacturePower, recording data and programming through one reversible cable. The two ASIC mezzanines stay.
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ONE CABLE / THREE PATHS
Power first. Then configure and record.
2. Configure the FPGA
USB2 commands reach 1.8 V JTAG through a level translator. Five bare fixture contacts recover the controller itself.
3. Record and send data
ASIC data enters the FPGA. Three proposed differential lanes and a clock reach the matching XEM receiver adapter.
Why each new circuit block is present
| Parts | Purpose |
|---|---|
| J4 | Full-featured USB-C connector: power, control and four differential pairs. |
| U200, Q200, D200/D201 | CC protection, attachment when unpowered, protected power entry and port ESD protection. |
| U201 | Independent 3.3 V supply so power negotiation does not depend on a running FPGA. |
| U202 | Controlled main-supply rise, latched overload breaker, reverse blocking and power-good. |
| U210, J210 | USB/PD controller and five copper-only initial-programming contacts; no fitted header. |
| U211, U213–U215 | Reversible cable routing and exposed data-pin ESD protection. |
| U6 | Smaller 64 Mbit USON flash for one FPGA boot image. Programming and startup remain to be tested. |
| U212 | 3.3 V controller to 1.8 V FPGA JTAG translation, disabled until FPGA power is valid. |
| C200–C239, R200–R236 (fitted subset) | Local supply bypass, thresholds, sensing, damping and defined reset defaults. |
Read the circuit explanation · Component list · Every pin and its net
MEASURED STATUS
Checks attached to this exact revision.
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Electrical-rule checks and connected copper do not demonstrate working firmware, acquisition timing, power integrity or manufacturing acceptance.
Which pins are deliberately unused?
NC means intentionally not connected. These pins are separate from the unfinished copper count. SBU1/SBU2 and three spare mezzanine contacts are NC in this revision; grounded control pins are connected, not unused.
| Part | NC pin numbers |
|---|
Snapshot identity and evidence
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Routing handoff · Native audit · Schematic checks · PCB checks · Cable and receiver contract
BEFORE MANUFACTURE
What still has to be proved.
Layout and assembly
Finish open copper, differential routing, protection placement, mechanical clearance and assembly review. The proposed dense 12-layer stack needs fabricator acceptance.
Power and firmware
Implement PD, USB control and recovery; test startup, unplug, faults, inrush, ripple, temperature and load margin.
Acquisition and receiver
Confirm ASIC timing and analog controls, build the matching adapter and verify the complete capture-to-PC data rate.
No order has been placed. The earlier micro-HDMI checkpoint and its report remain available as history.
EDITABLE FILES
Open the complete KiCad project.
Extract the whole ZIP, then open the .kicad_pro file. Keep its libraries and hierarchical sheets together. The retained filename preserves project dependencies.
Earlier micro-HDMI checkpoint and learning report · Meetings