{
  "schema_version": 1,
  "publication_date": "2026-10-05",
  "scope": "Current R39 and XEM8305 direct R3 prototype review; R2 and earlier dated assets preserved",
  "models": [
    {
      "revision": "XC7A35T-2CSG325I R37",
      "source_pcb_sha256": "4d39ef60c141cccb5cfcdf914a0e8e7119abe42b227c404eba31de9d5825f679",
      "source_preview_sha256": "ce2d4fe9be40c02141b8a183aa6d7cff02fb7251cf98f97f4711eb33729927c8",
      "geometry": "Current headboard plus connector-only mating template; no routing graphics.",
      "limitations": [
        "Routing and ASIC timing review unfinished",
        "Lower template is not a functional LDO board",
        "Populated fit, retention and manufacturing acceptance pending"
      ],
      "triangles": 195152,
      "path": "presentation/reviews/assets/2026-10-04/fpga35t-r37.glb",
      "bytes": 6308100,
      "sha256": "d9bbb0fbfcf1c440ae3f619d313e65629117c8dce9c3b58a36ec412dba5ac74b",
      "self_contained": true,
      "units": "metres, Y-up",
      "packing": {
        "before_primitives": 23615,
        "after_primitives": 33,
        "max_coordinate_error_m": 1.8613412963719433e-09,
        "max_normal_component_error": 4.440892098500626e-16,
        "verification": "Every per-material source vertex and normal matches the transformed output after float32 rounding; every triangle index is identical after concatenation; materials are deep-equal; no native paths or external URIs."
      }
    },
    {
      "source_pcb_filename": "LDO_Cabled_E5_Separate_Power_Header.kicad_pcb",
      "source_pcb_sha256": "c1a29c967b204a05ab232116f1b5fcda80d4d6189d148c9dda60db7208260a6b",
      "source_header_model_sha256": "5a6b7dc9f24b3e12dafe0a70189e9b9102689f2fb2b2866ad35fa8605756ca8a",
      "exporter": "KiCad 10.0.6 / Open CASCADE 7.9 native GLB",
      "triangles": 66254,
      "board_outline_mm": [
        18,
        25
      ],
      "header_body_included": "J4 JST SM02B-GHS-TB, source KiCad library model",
      "omissions": [
        "J1 and J19 Hirose housing model files unavailable; physical pad geometry remains",
        "J3 housing body not supplied; native footprint pads remain",
        "Inner copper excluded",
        "No flex cable, power wires, LDO board or carrier added"
      ],
      "qualification": "Geometry preview only; source/load/analog-ground return, connector/cable fit and powered operation remain unqualified.",
      "header_model_attribution": {
        "copyright": "2018 Frank Severinsen",
        "license": "CC-BY-SA 4.0 with KiCad electronic-design and generated-files exception",
        "license_reference": "https://github.com/KiCad/kicad-packages3D/blob/master/LICENSE.md",
        "cc_license_reference": "https://creativecommons.org/licenses/by-sa/4.0/legalcode",
        "evidence": "Copyright and license in source STEP header; geometry converted into assembly GLB. No manufacturer fit acceptance is implied."
      },
      "revision": "LDO E5 separate power header",
      "source_preview_sha256": "268e5823f827e8e53f180b55356fe6115526c105c0a818d1f6e44b985e2c9bd0",
      "export_warning": "Local wire-meshing warning; surface copper graphics may be incomplete. Native CAD is unchanged.",
      "path": "presentation/reviews/assets/2026-10-04/ldo-e5.glb",
      "bytes": 2138092,
      "sha256": "c05d6e26e317cbd78e83fc8391d1592f120867132e700f263974a44752532c99",
      "self_contained": true,
      "units": "metres, Y-up",
      "packing": {
        "before_primitives": 3615,
        "after_primitives": 9,
        "max_coordinate_error_m": 7.255934186822799e-09,
        "max_normal_component_error": 0,
        "verification": "Every per-material source vertex and normal matches the transformed output after float32 rounding; every triangle index is identical after concatenation; materials are deep-equal; no native paths or external URIs."
      }
    },
    {
      "revision": "XEM8305 A1R2 carrier assembly",
      "source_preview_hashes": {
        "module.glb": "f7478246eff4930e1d7273b9e743d6e53bc0d9a86ba7ec7e907ff8d3cb1f5af9",
        "carrier_A1.glb": "f34a9554b781f9d9c1dec17000c09fb881341e8f2ec40dcec7758eff578068cf",
        "e2_ldo_assembly.glb": "89ce600b95ec7c84f8e5a4dcff7bd22a8cb3b1ebe70edcf3996c5334d40b2182",
        "adapter_E3.glb": "b60611248041cb251fcaf64f6c6fd9e34821a7b4ffa63f4deaea48bfa06c4031"
      },
      "assembly_contract_sha256": "fad858cadfc7278477d5c85448a0a1c2ff54ae095c52fb4270e72203c8d2c3bc",
      "geometry": "Both J1/J19 mating pairs, XEM8305, carrier, E3 adapter, source LDO, nominal J3/J6 envelopes and exact 641-sample provisional cable.",
      "triangles": 1026895,
      "coordinate_transform": "Recorded millimetres/Z-up assembly to glTF metres/Y-up; E3 offset [-25,82,0] mm.",
      "omissions": [
        "Superseded E2 adapter board",
        "Unknown protrusion anchors"
      ],
      "qualification": "Cable and connector fit remain provisional. Pictured E3 predates separate E5 adapter; XEM8310 carrier power path is a distinct project.",
      "attribution": "Opal Kelly XEM8305 manufacturer visual; https://www.opalkelly.com/products/models/",
      "path": "presentation/reviews/assets/2026-10-04/xem8305-a1r2.glb",
      "bytes": 35198204,
      "sha256": "c0fa289c06013bd9a48b30341552088b15402afd3bccc2167bc92ea752461ede",
      "self_contained": true,
      "units": "metres, Y-up"
    },
    {
      "source_filename": "Probe_PCB_Frame_No_Ribs.stl",
      "source_sha256": "4059d6011d3cf4695b6e1f326b2e0cb9d5c65512b090e9673b953d7b4119cd56",
      "coordinate_transform": "STL Z-up mm to glTF Y-up metres: (x,y,z) -> (0.001*x,0.001*z,-0.001*y)",
      "triangles": 5080,
      "bounds_mm": {
        "min": [
          0.0,
          0.0,
          0.0
        ],
        "max": [
          20.0,
          21.25,
          3.0
        ]
      },
      "maximum_roundtrip_vertex_delta_mm": 9.238719940185547e-07,
      "omissions": [
        "No PCB/ASIC reference mesh added",
        "No installed stage, vacuum source, seal or hardware assembly added"
      ],
      "qualification": "Fit-check prototype geometry only; vacuum sealing and bonding stability untested.",
      "revision": "Bonding fixture V6 one-piece frame",
      "path": "presentation/reviews/assets/2026-10-04/bonding-v6.glb",
      "bytes": 366664,
      "sha256": "feeb89cab059d7a90a774d3443cb346b9ba91f70f75b1377787442ca3e61e6fd",
      "self_contained": true,
      "units": "metres, Y-up"
    },
    {
      "revision": "XC7A35T-2CSG325I R39",
      "source_pcb_sha256": "24fee50ce9d4716d141ff1ef69a9f5ebf692b9ca4f0834c81ed87eed4ed629b9",
      "source_pcb_filename": "FPGA35T_V15.kicad_pcb",
      "exporter": "KiCad 10.0.6 / Open CASCADE 7.9 native GLB",
      "export_options": [
        "--include-tracks",
        "--include-pads",
        "--include-silkscreen",
        "--include-soldermask"
      ],
      "geometry": "R39 headboard alone with available native component bodies, surface pads, existing partial tracks, silkscreen and soldermask. No lower mating template.",
      "board_outline_mm": [
        41,
        41
      ],
      "bundled_model_count": 34,
      "placed_model_references": 315,
      "bundled_models_identical_to_R37": true,
      "omissions": [
        "Inner copper excluded",
        "No future copper routes, vias or planes added",
        "No lower mating board, LDO board, cable or connector counterpart added",
        "Nominal package/envelope models remain visualization references; exact fit is unqualified"
      ],
      "qualification": "Physical DRC/ERC/parity checks pass for the pre-routing candidate; routing, factory-issued HDI construction, ASIC timing, populated fit and powered operation remain unqualified.",
      "triangles": 412382,
      "path": "presentation/reviews/assets/2026-10-05/fpga35t-r39.glb",
      "bytes": 14292940,
      "sha256": "64ce488aacf8ae5f7114b8c4e625e9218233d3e7fe17a5a2d14637fc5734c21b",
      "self_contained": true,
      "units": "metres, Y-up",
      "coordinate_transform": "Native KiCad GLB already metres/Y-up; native rigid node transforms baked into float32 vertex positions. Identical float32 position/normal vertex tuples deduplicated. No scale or axis conversion, added geometry or simplification.",
      "source_extents_m": [
        [
          -0.000600000113993883,
          -0.0032350000040978193,
          0.0
        ],
        [
          0.04100000113248825,
          0.004494997963119626,
          0.04100000113248825
        ]
      ],
      "export_warning": "No meshing warning. macOS emitted a source-attributes lookup warning for the initially nonexistent output file; export completed successfully.",
      "attribution": "Existing KiCad library license and generated-files exception retained at presentation/fpga/3d/assets/KiCad-LICENSE.md; the same 34 bundled package models used for R37, including project nominal manufacturer-drawing envelopes.",
      "packing": {
        "before_bytes": 20580024,
        "before_sha256": "1e8acd849c45c83619cc32c4967f7cd9ff87250e23bd5b73222e1ad427527166",
        "before_primitives": 37994,
        "after_primitives": 36,
        "before_vertices": 454912,
        "after_vertices": 452009,
        "max_coordinate_error_m": 1.8613412963719433e-09,
        "max_normal_component_error": 4.440892098500626e-16,
        "verification": "Every ordered triangle corner retains the exact transformed float32 position and normal; materials unchanged. Identical position/normal vertex tuples indexed once; no geometry simplification, external URI or private absolute path."
      }
    },
    {
      "revision": "XEM8305 Direct R2",
      "source_pcb_sha256": "620a8e3594cc1f12ca0ecee225075fa286efd4f8bef65905304d8c92da503cce",
      "path": "presentation/reviews/assets/2026-10-05/xem8305-direct/xem8305-direct-r2.glb",
      "bytes": 6092268,
      "sha256": "dc1f3243854bcca7dd94cd675a090b1b50b69cb603359c6c9ae8a816aaa9dba1",
      "self_contained": true,
      "units": "metres, Y-up",
      "geometry": "Carrier board and actual native surface copper/pads/outline plus five original nominal socket envelopes. Envelopes are not component CAD or a mechanical seating proof; other fitted parts are omitted. No assembled XEM/LDO model.",
      "native_triangles": 164841,
      "packing": {
        "batches": 8,
        "native_vertices_normals_and_indices_preserved_as_float32": true
      },
      "project_authored_envelopes": [
        {
          "reference": "MC1",
          "side": "top",
          "center_mm": [
            150.94999,
            79.262779
          ],
          "extent_mm": [
            3.85,
            37.75
          ],
          "height_mm": 3.5
        },
        {
          "reference": "MC2",
          "side": "top",
          "center_mm": [
            104.05,
            85.352499
          ],
          "extent_mm": [
            3.85,
            31.45
          ],
          "height_mm": 3.5
        },
        {
          "reference": "MC3",
          "side": "top",
          "center_mm": [
            125.4875,
            106.1
          ],
          "extent_mm": [
            31.45,
            3.85
          ],
          "height_mm": 3.5
        },
        {
          "reference": "J1",
          "side": "bottom",
          "center_mm": [
            130.85,
            41.25
          ],
          "extent_mm": [
            13.67,
            5.14
          ],
          "height_mm": 2.0
        },
        {
          "reference": "J19",
          "side": "bottom",
          "center_mm": [
            125.0,
            60.0
          ],
          "extent_mm": [
            8.45,
            5.14
          ],
          "height_mm": 2.0
        }
      ],
      "manufacturer_connector_models_included": false,
      "limitations": [
        "Simultaneous connector seating and actual populated fit",
        "ASIC silicon electrical/data-valid/setup/hold limits and FPGA timing closure",
        "Power source/load/current/thermal and sequencing verification",
        "Signal integrity, return paths and controlled-impedance process",
        "Factory stack-up/DFM and fabrication acceptance",
        "Firmware, USB acquisition and powered operation"
      ]
    },
    {
      "revision": "XEM8305 Direct R3",
      "source_pcb_sha256": "6e1cde48c3a146e691005f6e76434e98ce9298ac09ed0b13a128e490fa048e78",
      "path": "presentation/reviews/assets/2026-10-05/xem8305-direct-r3/xem8305-direct-r3.glb",
      "bytes": 12591900,
      "sha256": "5cf4b16d8c3b7b195dee23b658c53376993c32bef04adde9d324bd64087d3fa2",
      "self_contained": true,
      "units": "metres, Y-up",
      "geometry": "Native board/pads/outer copper with 63 project-authored nominal component envelopes; inner copper and assembled XEM/LDO stack omitted",
      "receipt": "presentation/reviews/assets/2026-10-05/xem8305-direct-r3/Public_R3_3D_Receipt.json",
      "vendor_model_payloads_included": false,
      "factory_or_physical_fit_approved": false
    }
  ],
  "images": [
    {
      "path": "presentation/reviews/assets/2026-10-04/V15_Headboard_And_Interface_Isometric.png",
      "bytes": 221436,
      "sha256": "14b85701fe33daa41da2157be15d7c690f1c39c0dc4d447a57dde882cf05a7d2",
      "title": "35T R37",
      "caption": "R37 headboard and connector-only mating template; routing unfinished."
    },
    {
      "path": "presentation/reviews/assets/2026-10-04/E5_Actual_CAD_Oblique_Top.png",
      "bytes": 954689,
      "sha256": "e9c06c40cd13ac34798bd9fff750303cd4deeb72ae363fc1db17918c30ba1e46",
      "title": "LDO E5",
      "caption": "Separate locking VDD/GND connector; power and fit qualification pending."
    },
    {
      "path": "presentation/reviews/assets/2026-10-04/A1R2_Selected_Assembly_Assembly_Rotated.png",
      "bytes": 242550,
      "sha256": "ad94d721bcf7c139c05cdcfcce59f34c0964c9e747ba1d30309db67b84361e2c",
      "title": "XEM8305 A1R2",
      "caption": "Both mating pairs; pictured E3 adapter predates E5."
    },
    {
      "path": "presentation/reviews/assets/2026-10-04/Fixture_V6_Fit_Check_Prototype_2026-10-03.png",
      "bytes": 359782,
      "sha256": "e94b410644a3ab6bab224f0127cacfa38508f6e8cedd7014e1507ed31c9ec734",
      "title": "Bonding fixture V6",
      "caption": "One-piece bottom-suction frame for fit-check prototype."
    },
    {
      "path": "presentation/reviews/assets/2026-10-05/R39_Bottom_3D.png",
      "bytes": 912424,
      "sha256": "ffcbf471176c5f321d8c6c9f53112139406f9da6ed13f82d04201ff862f8ca49",
      "revision": "R39",
      "source_pcb_sha256": "24fee50ce9d4716d141ff1ef69a9f5ebf692b9ca4f0834c81ed87eed4ed629b9",
      "content": "Native KiCad 3D populated view, actual board alone",
      "view": "Bottom, viewed from underside",
      "derivative": "Exact native KiCad visual source bytes, copied unchanged",
      "title": "35T R39 \u00b7 Bottom, viewed from underside",
      "caption": "Native KiCad 3D populated view, actual board alone; routing incomplete."
    },
    {
      "path": "presentation/reviews/assets/2026-10-05/R39_Bottom_3D.webp",
      "bytes": 175118,
      "sha256": "674f1bd8a6e52f96d6afd58ef2548a0dffb749834b378eaff25d41d6bb1d17c3",
      "revision": "R39",
      "source_pcb_sha256": "24fee50ce9d4716d141ff1ef69a9f5ebf692b9ca4f0834c81ed87eed4ed629b9",
      "content": "Native KiCad 3D populated view, actual board alone",
      "view": "Bottom, viewed from underside",
      "derivative": "WebP quality88 preview; exact PNG retained",
      "title": "35T R39 \u00b7 Bottom, viewed from underside",
      "caption": "Native KiCad 3D populated view, actual board alone; routing incomplete."
    },
    {
      "path": "presentation/reviews/assets/2026-10-05/R39_Bottom_Underside_Copper_Silk_Outline.png",
      "bytes": 305154,
      "sha256": "4320e449a941f11009600112ebbcb99476c0431a4af3234e681d42fcc3dc847f",
      "revision": "R39",
      "source_pcb_sha256": "24fee50ce9d4716d141ff1ef69a9f5ebf692b9ca4f0834c81ed87eed4ed629b9",
      "content": "Native KiCad surface copper, pads, silkscreen and outline; partial existing routing",
      "view": "Bottom, viewed from underside",
      "derivative": "Exact native KiCad visual source bytes, copied unchanged",
      "title": "35T R39 \u00b7 Bottom, viewed from underside",
      "caption": "Native KiCad surface copper, pads, silkscreen and outline; partial existing routing; routing incomplete."
    },
    {
      "path": "presentation/reviews/assets/2026-10-05/R39_Bottom_Underside_Copper_Silk_Outline.svg",
      "bytes": 262298,
      "sha256": "47137803fd4bbac7474c744ed5a8bd6f66b02844996e7147318a423d954083f9",
      "revision": "R39",
      "source_pcb_sha256": "24fee50ce9d4716d141ff1ef69a9f5ebf692b9ca4f0834c81ed87eed4ed629b9",
      "content": "Native KiCad surface copper, pads, silkscreen and outline; partial existing routing",
      "view": "Bottom, viewed from underside",
      "derivative": "Native KiCad SVG; trailing line whitespace removed for repository checks. Drawing coordinates, styles and text unchanged.",
      "source_visual_sha256": "2c5f65e00517def0ccc5e21ce579cf1da6ea84f6f12fd32511bfbfa7a5a70002",
      "title": "35T R39 \u00b7 Bottom, viewed from underside",
      "caption": "Native KiCad surface copper, pads, silkscreen and outline; partial existing routing; routing incomplete."
    },
    {
      "path": "presentation/reviews/assets/2026-10-05/R39_Bottom_Underside_Copper_Silk_Outline.webp",
      "bytes": 154772,
      "sha256": "629462cb2f2dde98cf86de279e50b33539cde39ae6a2356458e19b605e9de7b6",
      "revision": "R39",
      "source_pcb_sha256": "24fee50ce9d4716d141ff1ef69a9f5ebf692b9ca4f0834c81ed87eed4ed629b9",
      "content": "Native KiCad surface copper, pads, silkscreen and outline; partial existing routing",
      "view": "Bottom, viewed from underside",
      "derivative": "WebP quality88 preview; exact PNG retained",
      "title": "35T R39 \u00b7 Bottom, viewed from underside",
      "caption": "Native KiCad surface copper, pads, silkscreen and outline; partial existing routing; routing incomplete."
    },
    {
      "path": "presentation/reviews/assets/2026-10-05/R39_Top_3D.png",
      "bytes": 754547,
      "sha256": "21e666a4369e8a0d56446952dee672f265ab868c73021b95ddf2b8b3031b1be0",
      "revision": "R39",
      "source_pcb_sha256": "24fee50ce9d4716d141ff1ef69a9f5ebf692b9ca4f0834c81ed87eed4ed629b9",
      "content": "Native KiCad 3D populated view, actual board alone",
      "view": "Top",
      "derivative": "Exact native KiCad visual source bytes, copied unchanged",
      "title": "35T R39 \u00b7 Top",
      "caption": "Native KiCad 3D populated view, actual board alone; routing incomplete."
    },
    {
      "path": "presentation/reviews/assets/2026-10-05/R39_Top_3D.webp",
      "bytes": 132212,
      "sha256": "926b59a52ac099fddf6fc920f1a438a0648773f202a69e2d80267e434e43cc24",
      "revision": "R39",
      "source_pcb_sha256": "24fee50ce9d4716d141ff1ef69a9f5ebf692b9ca4f0834c81ed87eed4ed629b9",
      "content": "Native KiCad 3D populated view, actual board alone",
      "view": "Top",
      "derivative": "WebP quality88 preview; exact PNG retained",
      "title": "35T R39 \u00b7 Top",
      "caption": "Native KiCad 3D populated view, actual board alone; routing incomplete."
    },
    {
      "path": "presentation/reviews/assets/2026-10-05/R39_Top_Copper_Silk_Outline.png",
      "bytes": 343542,
      "sha256": "f665eebcef866ce5079d7cfc1733ecf25cb8bb11f6160c9eb2cb05103763ac51",
      "revision": "R39",
      "source_pcb_sha256": "24fee50ce9d4716d141ff1ef69a9f5ebf692b9ca4f0834c81ed87eed4ed629b9",
      "content": "Native KiCad surface copper, pads, silkscreen and outline; partial existing routing",
      "view": "Top",
      "derivative": "Exact native KiCad visual source bytes, copied unchanged",
      "title": "35T R39 \u00b7 Top",
      "caption": "Native KiCad surface copper, pads, silkscreen and outline; partial existing routing; routing incomplete."
    },
    {
      "path": "presentation/reviews/assets/2026-10-05/R39_Top_Copper_Silk_Outline.svg",
      "bytes": 309492,
      "sha256": "c16fc623c2b8b8dc179aca700f1db23ac8f411ab0478198c05ddb16eaefe4612",
      "revision": "R39",
      "source_pcb_sha256": "24fee50ce9d4716d141ff1ef69a9f5ebf692b9ca4f0834c81ed87eed4ed629b9",
      "content": "Native KiCad surface copper, pads, silkscreen and outline; partial existing routing",
      "view": "Top",
      "derivative": "Native KiCad SVG; trailing line whitespace removed for repository checks. Drawing coordinates, styles and text unchanged.",
      "source_visual_sha256": "816b0799d1ce26f4d5cc49a9ec42037cf7f8f8c93afbf3f059c1013c9fe8d199",
      "title": "35T R39 \u00b7 Top",
      "caption": "Native KiCad surface copper, pads, silkscreen and outline; partial existing routing; routing incomplete."
    },
    {
      "path": "presentation/reviews/assets/2026-10-05/R39_Top_Copper_Silk_Outline.webp",
      "bytes": 196822,
      "sha256": "df49c9916e60b250f0bd53b1731eab15a2d94c211a04745b309f169c10a6242c",
      "revision": "R39",
      "source_pcb_sha256": "24fee50ce9d4716d141ff1ef69a9f5ebf692b9ca4f0834c81ed87eed4ed629b9",
      "content": "Native KiCad surface copper, pads, silkscreen and outline; partial existing routing",
      "view": "Top",
      "derivative": "WebP quality88 preview; exact PNG retained",
      "title": "35T R39 \u00b7 Top",
      "caption": "Native KiCad surface copper, pads, silkscreen and outline; partial existing routing; routing incomplete."
    }
  ],
  "packing": "Identical-material batching and exact vertex tuple indexing only; no geometry simplification.",
  "xem_validation": "Direct screenshot review used actual included PNG hash; no claim that prior private browser-validation screenshot hashes match.",
  "direct_R2_native_views": [
    {
      "path": "presentation/reviews/assets/2026-10-05/xem8305-direct/XEM8305_Direct_R2_Bottom.svg",
      "bytes": 94750,
      "sha256": "b9f4e0cefff36165700de9683f4aa4275168cdd1746dd177e340285abce37dc6",
      "source_pcb_sha256": "620a8e3594cc1f12ca0ecee225075fa286efd4f8bef65905304d8c92da503cce"
    },
    {
      "path": "presentation/reviews/assets/2026-10-05/xem8305-direct/XEM8305_Direct_R2_Top.svg",
      "bytes": 157576,
      "sha256": "13bf3369ab66e5b6bbb173a9ad939e61918c76049eb506a0a74a79069595214b",
      "source_pcb_sha256": "620a8e3594cc1f12ca0ecee225075fa286efd4f8bef65905304d8c92da503cce"
    }
  ]
}